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OwnerCheemen Yu, Chih-Chin Liao +1inventors
InventorsCheemen Yu, Chih-Chin Liao, Hem Takiar
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A panel is disclosed on which a plurality of integrated circuit package outlines may be fabricated within a plurality of process tools. The panel includes recessed portions in the exposed surfaces of the molding compound and/or the substrate. The recesses relieve stress resulting from disparate coefficients of expansion between the substrate and molding compound applied to the substrate around the integrated circuits. In embodiments, the recesses may be formed as lines scored into the surface of the molding compound or substrate. Alternatively, the recesses may be formed in the solder mask on the substrate during a process for applying the solder mask, or the recesses may be formed in the molding compound during the encapsulation process.
A method of fabricating integrated circuits on a panel, the method comprising the steps of:
A method of fabricating integrated circuits on a panel, the panel having a length oriented along the direction of travel of the panel through a process tool and a width transverse to and smaller than the length, the method comprising the steps of:
A method of fabricating integrated circuits on a panel, the panel having a length oriented along the direction of travel of the panel through a process tool and a width transverse to and smaller than the length, the method comprising the steps of:
Dependencies are inferred from the claim text.