Low Voltage Head Room Detection For Reliable Start-Up Of Self-Biased Analog Circuits
AssigneeInternational Business Machines Corporation
InventorsBradford L. Hunter, Joseph A. Iadanza
Life of this patent
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Abstract
A method and structure for preventing operation of a circuit in a high current operating region by disabling a start-up circuit until a power supply headroom is detected at a predetermined voltage level.
Claims19
A method, comprising preventing operation of a circuit in a high current operating region by disabling a start-up circuit until a power supply headroom is detected at a predetermined voltage level.
A structure, comprising:
- a resistive divider and a PMOS detection device with a resistive load to set a power supply detection level;
- a capacitor to ensure generation of a disable signal for at least a minimum period of time;
- a series of inverters for noise immunity;
- and
- a half latch with disable which is disabled when the power supply is below a target power supply voltage level, wherein
- an enable signal is generated that changes state in accordance with the target power supply voltage level.
A circuit comprising a low voltage headroom detection enable generator circuit configured and structured to disable an automatic start-up circuitry of a self-biased analog circuit when a power supply headroom is below a target power supply headroom voltage level.
Dependencies are inferred from the claim text.