Delay Circuit
AssigneeNEC Electronics Corporation
InventorToshiaki MOTOYUI
Life of this patent
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Abstract
A delay circuit to generate and output a delayed signal delayed from an input signal includes a reference pulse generating circuit to generate a reference pulse train in response to the input of the input signal, the reference pulse generating circuit having a feedback circuit containing a delay portion to determine a time interval between the reference pulses, a counter to output count signals based on a reference clock, the counter receiving the reference pulse train generated by the reference pulse generating circuit as the reference clock, and a delayed signal output circuit to generate and output the delayed signal based on the input signal and the count signals.
Claims20
A delay circuit to generate and output a delayed signal delayed from an input signal comprising:
- a reference pulse generating circuit to generate a reference pulse train in response to the input of the input signal, the reference pulse generating circuit having a feedback circuit containing a delay portion to determine a time interval between the reference pulses;
- a counter to output count signals based on a reference clock, the counter receiving the reference pulse train generated by the reference pulse generating circuit as the reference clock;
- and
- a delayed signal output circuit to generate and output the delayed signal based on the input signal and the count signals.
Dependencies are inferred from the claim text.