Back to results
US 2008/0303545 A1Published application
Low Power and Low Noise Differential Input Circuit
AssigneeHuaya Microelectronics, Ltd.
InventorJames Chow
Life of this patent
Estimating the term…
Abstract
A differential input circuit with lower power consumption and noise is disclosed. Rather than completely discharging output nodes differential circuits, the present invention equalizes the output nodes to conserver power and to reduce noise. Specifically, an equalization circuit is coupled between the output nodes of the low power and low noise differential input circuit.
Claims20
A differential input circuit comprising:
- a first input block having a first power terminal coupled to a positive power supply, a control terminal coupled to receive a true input signal, and a second power terminal;
- a first output block having a first power terminal coupled to the second power terminal of the first input block, a second power terminal coupled to ground, an output terminal providing a first output signal, and a control terminal;
- a second input block having a first power terminal coupled to a positive power supply, a control terminal coupled to receive a complementary input signal, and a second power terminal;
- a second output block having a first power terminal coupled to the second power terminal of the second input block, a second power terminal coupled to ground, an output terminal providing a second output signal and coupled to the control terminal of the first output block, and a control terminal coupled to the output terminal of the first output block;
- and
- a first equalization circuit coupled between the output terminal of the first output block and the output terminal of the second output block.
3 more elements
A differential input circuit comprising:
- a first input block having a first power terminal coupled to a positive power supply, a control terminal coupled to receive a true input signal, and a second power terminal;
- a first output block having a first power terminal coupled to the second power terminal of the first input block, a second power terminal coupled to ground, an output terminal providing a first output signal, and a control terminal;
- a second input block having a first power terminal coupled to a positive power supply, a control terminal coupled to receive a complementary input signal, and a second power terminal;
- a second output block having a first power terminal coupled to the second power terminal of the second input block, a second power terminal coupled to ground, an output terminal providing a second output signal and coupled to the control terminal of the first output block, and a control terminal coupled to the output terminal of the first output block;
- and
- a first equalization circuit coupled between the first power terminal of the first output block and the first power terminal of the second output block.
3 more elements
A differential input circuit comprising:
- a first input transistor having a first power terminal coupled to a positive power supply, a control terminal coupled to receive a true input signal, and a second power terminal;
- a first output transistor having a first power terminal coupled to the second power terminal of the first input transistor, a second power terminal providing a first output signal, and a control terminal;
- a second output transistor having a first power terminal coupled to the second poser terminal of the first output transistor, a second power terminal coupled to ground, and a control terminal coupled to the control terminal of the first output transistor;
- a second input transistor having a first power terminal coupled to a positive power supply, a control terminal coupled to receive a complementary input signal, and a second power terminal;
- a third output transistor having a first power terminal coupled to the second power terminal of the second input transistor, a second power terminal providing a second output signal and coupled to the control terminal of the first output transistor, and a control terminal coupled to the output terminal of the first output transistor;
- a fourth output transistor having a first power terminal coupled to the second power terminal of the third output transistor, a second power terminal coupled to ground, and a control terminal coupled to the control terminal of the third output transistor;
- and
- a first equalization transistor coupled between the second power terminal of the first output transistor and the second power terminal of the third output transistor
5 more elements
Dependencies are inferred from the claim text.