Varying mugfet width to adjust device characteristics
OwnerWeize Xiong, Cloves Rinn Cleavelininventors
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Abstract
One embodiment of the present invention relates to an integrated circuit that includes a first multi-gate transistor that has a first fin width and a first threshold voltage. The integrated circuit also includes a second multi-gate transistor that has a second fin width that is greater than the first width and a second threshold voltage that is less than the first threshold voltage. Other circuits and methods are also disclosed.
Claims20
An integrated circuit comprising:
- a first multi-gate transistor having a first fin width and a first threshold voltage;
- and
- a second multi-gate transistor having a second fin width that is greater than the first width and having a second threshold voltage that is less than the first threshold voltage.
An integrated circuit comprising:
- a first multi-gate transistor having a first voltage threshold, the first multi-gate transistor comprising:
- a first fin having a first width;
- a first gate electrode having a first gate length that straddles the first fin approximately along the first width;
- and a first source and first drain separated from one another by approximately the first gate length;
- and
- a second multi-gate transistor having a second voltage threshold that is less than the first voltage threshold, the second multi-gate transistor comprising:
- a second fin having a second width that is greater than the first width;
- a second gate electrode having a second gate length that straddles the second fin approximately along the second width;
- and a second source and second drain separated from one another by approximately the second gate length.
A method of providing an integrated circuit, comprising:
- providing respective multiple voltage thresholds for a plurality of multi-gate transistors by varying respective fin widths of the multi-gate transistors.
The method of claim 18, where the one multi-gate transistor has a fin width that is greater than the gate length of the one multi-gate transistor.
Dependencies are inferred from the claim text.