Charge-balance power device comprising columnar structures and having reduced resistance

A process for manufacturing a charge-balance power device, comprising the steps of:

• forming a semiconductor body having a first conductivity type;
• forming, in said semiconductor body, at least two columnar structures having a second conductivity type;
• forming, in said semiconductor body, a first surface region having the second conductivity type;
• and
• forming, within said first surface region, a second surface region of the first conductivity type,
• wherein the step of forming a first surface region comprises introducing dopant ions so that the first surface region will extend on top of and in contact with both of the columnar structures.

A power device, comprising:

• a substrate having the first conductivity type;
• a semiconductor layer formed on the substrate and having the first conductivity type and first and second surfaces, the second surface being defined as the junction between the semiconductor layer and the substrate;
• body regions having a second conductivity type formed in the semiconductor layer spaced apart from one another and extending from the first surface of the semiconductor layer;
• source regions formed in the body regions;
• at least two columnar structures formed in the semiconductor layer, the columnar structures being spaced apart from one another and each of the columnar structures having the second conductivity type and extending from a corresponding one of the body regions towards the second surface of the semiconductor layer;
• a gate structure formed on the first surface of the semiconductor layer and being positioned between and partially overlapping the body regions;
• and
• a drain contact formed on a surface of the substrate opposite the surface on which the semiconductor layer is formed.

An electronic system, comprising:

• electronic circuitry operable to perform a desired function, the electronic circuitry including at least one power device and at least some of the power devices comprising,
• a substrate having the first conductivity type;
• a semiconductor layer formed on the substrate and having the first conductivity type and first and second surfaces, the second surface being defined as the junction between the semiconductor layer and the substrate;
• body regions having a second conductivity type formed in the semiconductor layer spaced apart from one another and extending from the first surface of the semiconductor layer;
• source regions formed in the body regions;
• at least two columnar structures formed in the semiconductor layer, the columnar structures being spaced apart from one another and each of the columnar structures having the second conductivity type and extending from a corresponding one of the body regions towards the second surface of the semiconductor layer;
• a gate structure formed on the first surface of the semiconductor layer and being positioned between and partially overlapping the body regions;
• and
• a drain contact formed on a surface of the substrate opposite the surface on which the semiconductor layer is formed.

A method of forming a power device in a semiconductor, comprising:

• a substrate having the first conductivity type;
• a semiconductor layer formed on the substrate and having the first conductivity type and first and second surfaces, the second surface being defined as the junction between the semiconductor layer and the substrate;
• body regions having a second conductivity type formed in the semiconductor layer spaced apart from one another and extending from the first surface of the semiconductor layer;
• source regions formed in the body regions;
• at least two columnar structures formed in the semiconductor layer, the columnar structures being spaced apart from one another and each of the columnar structures having the second conductivity type and extending from a corresponding one of the body regions towards the second surface of the semiconductor layer;
• a gate structure formed on the first surface of the semiconductor layer and being positioned between and partially overlapping the body regions;
• and
• a drain contact formed on a surface of the substrate opposite the surface on which the semiconductor layer is formed.