Memory Device with Error Correction Capability and Preemptive Partial Word Write Operation

A method for use in a memory device comprising a memory array having a plurality of memory cells, the memory device further comprising error correction circuitry coupled to the memory array and configured to process words retrieved from the memory array, the method comprising the step of:

• performing a partial word write operation in which an error correction code encode process for the given retrieved word is initiated prior to completion of an error correction code decode process for the given retrieved word based on an assumption that the error correction code decode process will not indicate an error in the given retrieved word, and further wherein if the error correction code decode process when completed indicates an error in the given retrieved word, the error in the given retrieved word is corrected in the error correction circuitry, and the error correction code encode process is restarted using the corrected word.

A method for use in a memory device comprising a memory array having a plurality of memory cells, the memory device further comprising error correction circuitry coupled to the memory array and configured to process datawords and error correction words retrieved from the memory array, the method comprising the step of:

• performing a partial word write operation in which a first dataword and an associated first error correction word are retrieved from the memory array, and one or more bits of the first dataword are modified to produce a second dataword, wherein a second error correction word is determined for the second dataword before a determination is made based on the first error correction word as to whether or not the first dataword contains an error.