US 2008/0290934 A1 · REFERENCE BUFFER CIRCUITS

Abstract

A reference buffer circuit is disclosed, providing a reference voltage at an output node and comprising a closed-loop branch comprising an amplifier and first and second MOS transistors and an open-loop branch comprising third and fourth MOS transistors and a tracking circuit. The first MOS transistor has a gate coupled to an output terminal of the amplifier and a source coupled to a negative input terminal of the amplifier. The second MOS transistor is coupled to the source of the first MOS transistor. The third MOS transistor has a gate coupled to the output terminal and a source coupled to the output node. The fourth MOS transistor has a drain coupled to the source of the third MOS transistor. A gate voltage of the fourth MOS transistor tracks a drain voltage of the third MOS transistor through the tracking circuit.

Claims26

Dependent claims

A reference buffer circuit for providing a reference voltage at an output node, comprising:

a closed-loop branch comprising:
an amplifier having a positive input terminal for receiving an input voltage, a negative input terminal, and an output terminal;
a first metal oxide semiconductor (MOS) transistor having a gate coupled to the output terminal of the amplifier, a source coupled to the negative input terminal of the amplifier, and a drain;
and
a second MOS transistor coupled to the source of the first MOS transistor;
and
an open-loop branch comprising:
a third MOS transistor having a gate coupled to the output terminal of the amplifier, a source coupled to the output node, and a drain;
a fourth MOS transistor having a drain coupled to the source of the third MOS transistor, a source, and a gate;
and
a first tracking circuit arranged to make a voltage of the gate of the fourth MOS transistor track a voltage of the drain of the third MOS transistor.

8 more elements

A reference buffer circuit for providing a first reference voltage at a first output node and a second reference voltage at a second output node, comprising:

a closed-loop branch comprising:
a first amplifier having a positive input terminal for receiving a first input voltage, a negative input terminal, and an output terminal;
a second amplifier having a positive input terminal for receiving a second input voltage, a negative input terminal, and an output terminal;
a first metal oxide semiconductor transistor having a gate coupled to the output terminal of the first amplifier, a source coupled to the negative input terminal of the first amplifier, and a drain;
a second MOS transistor having a gate coupled to the output terminal of the second amplifier, a source coupled to the negative input terminal of the second amplifier, and a drain coupled to the drain of the first MOS transistor;
and
a third MOS transistor coupled to the source of the second MOS transistor;
and
an open-loop branch comprising:
a fourth MOS transistor having a gate coupled to the output terminal of the first amplifier, a source coupled to the first output node, and a drain;
a fifth MOS transistor having a gate coupled to the output terminal of the second amplifier, a source coupled to the second output node and a drain coupled to the drain of the fourth MOS transistor;
a sixth MOS transistor having a drain coupled to the source of the fifth MOS transistor, a source, and a gate;
and
a first tracking circuit arranged to make a voltage of the gate of the sixth MOS transistor track a voltage of the drain of the fifth MOS transistor.

11 more elements

A reference buffer circuit for providing a first reference voltage at a first output node and a second reference voltage at a second output node, comprising:

a closed-loop branch comprising:
a first amplifier having a positive input terminal for receiving a first input voltage, a negative input terminal, and an output terminal;
a second amplifier having a positive input terminal for receiving a second input voltage, a negative input terminal, and an output terminal;
a first source-follower transistor having a gate coupled to the output terminal of the first amplifier, a source coupled to the negative input terminal of the first amplifier, and a drain;
a second source-follower transistor having a gate coupled to the output terminal of the second amplifier, a source coupled to the negative input terminal of the second amplifier, and a drain coupled to the drain of the first source-follower transistor;
and
a first current transistor coupled to the source of the second source-follower transistor;
and
an open-loop branch comprising:
a first driving transistor having a gate coupled to the output terminal of the first amplifier, a source coupled to the first output node, and a drain;
a second driving transistor having a gate coupled to the output terminal of the second amplifier, a source coupled to the second output node, and a drain coupled to the drain of the first driving transistor;
a second current transistor coupled to the source of the second driving transistor;
a first current source coupled to the gate of the second current transistor;
and
a first tracking transistor having a gate for receiving a bias voltage, a source coupled to the drain of the second driving transistor, and a drain coupled to the gate of the second current transistor.

12 more elements

Dependencies are inferred from the claim text.

Reference buffer circuits

Life of this patent

Reference buffer circuits

Life of this patent

Abstract

Claims26