Buffering circuit of semiconductor device
AssigneeHynix Semiconductor Inc.
InventorJun-Woo Lee
Life of this patent
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Abstract
A buffering circuit of a semiconductor device includes: a first buffer configured to receive a first power voltage and a second power voltage as driving power voltages to buffer an input signal; a power supplier configured to adjust supply amounts of the first and second power voltages in response to a plurality of driving power signals to supply first and second driving power voltages; and a second buffer configured to receive the first and second driving power voltages, and to buffer an output signal of the first buffer.
Claims17
A buffering circuit of a semiconductor device, comprising:
- a first buffer configured to receive a first power voltage and a second power voltage as driving power voltages to buffer an input signal;
- a power supplier configured to adjust supply amounts of the first and second power voltages in response to a plurality of driving power signals to supply first and second driving power voltages;
- and
- a second buffer configured to receive the first and second driving power voltages, and to buffer an output signal of the first buffer.
A semiconductor device, comprising:
- a first buffer configured to receive a first power voltage and a second power voltage as driving power voltages to buffer an input signal;
- a ZQ calibration block configured to generate a plurality of first impedance adjusting codes and a plurality of second impedance adjusting codes corresponding to a resistance of a ZQ-resistor;
- a power supplier configured to adjust supply amounts of the first and second power voltages to supply first and second driving power voltages in response to the first and second impedance adjusting codes;
- and
- a second buffer configured to receive the first and second driving power voltages, and to buffer an output signal of the first buffer.
Dependencies are inferred from the claim text.