Semiconductor structure with dielectric-sealed doped region
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHuan-Tsung Huang, Kuo-Cheng Wu, Carlos H. Diaz
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Abstract
Leakage current can be substantially reduced by the formation of a seal dielectric in place of the conventional junction between source/drain region(s) and the substrate material. Trenches are formed in the substrate and lined with a seal dielectric prior to filling the trenches with semiconductor material. Preferably, the trenches are overfilled and a CMP process planarizes the overfill material. An epitaxial layer can be grown atop the trenches after planarization, if desired.
Claims20
A semiconductor structure comprising:
- a substrate;
- a source/drain region formed at least partially within the substrate;
- and
- a seal dielectric substantially completely enclosing the source/drain region.
A semiconductor structure comprising:
- a substrate;
- an isolation feature defining an active region of the substrate;
- a seal dielectric within the substrate and defining an electrically insulated well region;
- and
- a first doped region formed partially within the electrically insulated well region and extending at least co-terminously with the electrically insulated well region.
A semiconductor structure comprising:
- a semiconductor substrate;
- an isolation structure formed in the semiconductor substrate;
- a source/drain region substantially adjacent said isolation structure, the source/drain region including:
- a region of doped semiconductor material, the region being substantially isolated from the semiconductor substrate by a dielectric liner, an extension region extending outside a boundary defined by said dielectric liner, and a silicide region;
- a gate overlying said substrate and at least partially overlying said extension region;
- and
- a sidewall spacer on a sidewall of said gate and substantially aligned with said silicide region.
Dependencies are inferred from the claim text.