Instruction dependent dynamic voltage compensation
AssigneeInternational Business Machines Corporation
InventorDeepak K. Singh
Life of this patent
Estimating the term…
Abstract
A method for compensating for dynamic IR (voltage) drop for instruction execution. In a data processing system having a memory, and a central processing unit (CPU), where the CPU includes an adaptive power supply, a method is provided for determining the power required for instruction execution, adjusting power supplied by the adaptive power supply to the CPU to execute the instruction, and dispatching the instruction from the memory to the CPU for execution.
Claims17
A method of regulating power for instruction execution in a data processing system having a memory for storing instructions and a central processing unit (CPU) including an adaptive power supply, the method comprising the steps of:
- determining power required for executing an instruction,
- adjusting power supplied by the adaptive power supply to the CPU for execution of at least the instruction, and
- dispatching the instruction from said memory to the CPU.
A data processing system comprising:
- a central processing unit (CPU) having an adaptive voltage supply,
- a memory including program instructions for execution by the CPU and connected to the CPU,
- a power supervisor circuit connected to the memory to receive instructions and to determine power required for execution of at least one instruction,
- an adaptive voltage supply connected to the power supervisor circuit to adjust power for the CPU for execution of the instruction, and
- a dispatching circuit for dispatching the instruction to the CPU.
A method of dispatching a thread of instructions in a data processing system having a memory for storing instructions and a plurality of central processing units (CPUs), each CPU including an adaptive power supply, the method comprising the steps of:
- determining power required for executing the thread of instructions,
- adjusting power supplied by the adaptive power supply to a CPU, and
- dispatching instructions from said memory to the CPU.
A data processing system comprising:
- a plurality of central processing units (CPUs) where each CPU having an adaptive voltage supply,
- a memory including program instructions for execution by a CPU and connected to said plurality of CPUs,
- a power supervisor circuit connected to the memory to receive instructions, to select a CPU to execute the instructions and to determine power required for execution of at least one instruction,
- each adaptive voltage supply connected to the power supervisor circuit to receive a signal indicating power required for execution of the instructions, and
- a dispatching circuit for dispatching instructions to the selected CPU.
A computer program product stored in a computer operable media, the computer operable media containing instructions for execution by a computer, which, when executed by the computer, cause the computer to implement a method of regulating power for instruction execution in a data processing system having a memory for storing instructions and a central processing units (CPU) including an adaptive power supply, the method comprising the steps of:
- determining power required for executing an instruction,
- adjusting power supplied by the adaptive power supply to the CPU for execution of at least one instruction, and
- dispatching the instruction from said memory to the CPU.
The computer program product of 13 wherein said determining step includes obtaining data of power required for the instruction execution.
A computer program product stored in a computer operable media, the computer operable media containing instructions for execution by a computer, which, when executed by the computer, cause the computer to implement a method of dispatching a thread of instructions in a data processing system having a memory for storing instructions and a plurality of central processing units (CPUs), each CPU including an adaptive power supply, the method comprising the steps of:
- determining power required for executing the thread of instructions,
- adjusting power supplied by the adaptive power supply to a CPU, and
- dispatching instructions from said memory to the CPU.
Dependencies are inferred from the claim text.