Method and architecture for restricting access to a memory device

An access protocol to allow access to a memory device by an external device, the access protocol including:

• receiving at the memory device an access request to a selected storage area by the external device;
• in case the selected storage area is not a freely accessible area, performing an unlock procedure including:
• having the memory issuing to the external device a first code;
• at the external device, receiving the first code and, responsive thereto, sending to the memory device a second code depending on the first code;
• at the memory device, at least temporarily unlocking the selected storage area to allow access thereto by the external device based on the received second code.

An electronic system including:

• a memory device adapted to store data, and at least one external device interacting with the memory device;
• wherein the memory device includes:
• at least one storage area for storing data;
• a protection control structure adapted to selectively allow an external device access to the at least one storage area of the memory, the storage area being not freely accessible by the external device if protected;
• a control logic adapted to identify an access request by the external device to the at least one storage area and cooperating with the protection control structure for managing an unlock procedure for selectively granting the external device at least temporary access rights to the storage area if protected;
• means for providing a first code to the external device in said unlock procedure;
• means for receiving a second code from the external device in response to said first code;
• means for verifying validity of the received second code, wherein said means for verifying validity are adapted to ascertain a correspondence of the second code with the first code based on a predetermined relationship;
• said control logic instructing the protection control structure to grant access to the storage area if the validity of the received second code has been verified;
• and wherein the external device includes:
• means for issuing an access request to the memory device;
• means for receiving the first code from the memory device;
• means for generating the second code based on the received first code;
• and
• means for sending the second code to the memory device.

A memory device including:

• at least one storage area for storing data;
• a read protection control structure adapted to selectively allow an external device external to the memory read access to the at least one storage area of the memory for reading an information content thereof, the storage area, if protected against reading, being not freely accessible in reading by the external device;
• a modify protection control structure adapted to selectively allow the external device modify access to the at least one storage area of the memory for modifying the information content thereof, the storage area, if protected against modify, being not freely accessible in modify by the external device;
• a control logic adapted to identify a read access request, respectively a modify access request from the external device to the at least one storage area, and adapted to cooperate with the read protection control structure and with the modify protection control structure for managing a procedure for selectively granting the external device at least temporary read access rights and, respectively, a procedure for selectively granting the external device at least temporary modify access rights to the storage area;
• wherein said control logic, in said procedure for selectively granting the external device modify access rights, is adapted to condition the granting of said modify access rights to the granting of the read access rights to the storage area.

An integrated circuit, comprising:

• a memory location operable to store data;
• and
• a control circuit operable to,
• send a first code value to a requestor external to the integrated circuit in response to a request from the requestor to access the memory location,
• receive a second code value from the requester after sending the first code value,
• compare the second code value to a predetermined code value, and
• allow the requestor to access the memory location if the second code value has a predetermined relationship to the predetermined code value.

An integrated circuit, comprising:

• protected memory locations operable to store data;
• and
• a control circuit operable to,
• receive from a requestor external to the integrated circuit a first request for a first type of access to a first one of the memory locations, and
• in response to the first request, enable the first memory location for the first type of access by the requestor if one of the memory locations is enabled for a second type of access by the requester.

An integrated circuit, comprising:

• a code-value generator;
• and
• a control circuit coupled to the code-value generator and operable to
• send an address to a destination external to the integrated circuit,
• request a first code value from the destination,
• cause the generator to generate a second code value from the first code value,
• send the second code value to the destination, and
• access a data-storage location of the destination corresponding to the address after sending the second code value.

An integrated circuit, comprising:

• a control circuit operable to access in a first manner a first one of a plurality of memory locations that are external to the integrated circuit by
• obtaining first authorization to access one of the memory locations in a second manner,
• obtaining second authorization to access the first one of the memory locations in the first manner, and
• accessing the first one of the memory locations in the first manner after obtaining the first and second authorizations.

An electronic system, comprising:

• a first integrated circuit;
• and
• a second integrated circuit coupled to the first integrated circuit and including
• a memory location operable to store data, and
• a control circuit operable to,
• send a first code value to the first integrated circuit in response to a request from the first integrated circuit to access the memory location,
• receive a second code value from the first integrated circuit after sending the first code value,
• compare the second code value to a predetermined code value, and
• allow the first integrated circuit to access the memory location if the second code value has a predetermined relationship to the predetermined code value.

An electronic system, comprising:

• a first integrated circuit;
• and
• a second integrated circuit coupled to the first integrated circuit and including
• memory locations operable to store data, and
• a control circuit operable to,
• receive from the first integrated circuit a first request for a first type of access to a first one of the memory locations, and
• in response to the first request, enable the first memory location for the first type of access by the first integrated circuit if one of the memory locations is enabled for a second type of access by the first integrated circuit.

An electronic system, comprising:

• a first integrated circuit having a data-storage location;
• and
• a second integrated circuit coupled to the first integrated circuit and including
• a code-value generator, and
• a control circuit coupled to the code-value generator and operable to
• send an address of the data-storage location to the first integrated circuit,
• request a first code value from the first integrated circuit,
• cause the generator to generate a second code value from the first code value,
• send the second code value to the first integrated circuit, and
• access the data-storage location after sending the second code value.

An electronic system, comprising:

• a first integrated circuit having memory locations;
• and
• a second integrated circuit coupled to the first integrated circuit and including
• a control circuit operable to access in a first manner a first one of the memory locations by
• obtaining first authorization to access one of the memory locations in a second manner,
• obtaining second authorization to access the first one of the memory locations in the first manner, and
• accessing the first one of the memory locations in the first manner after obtaining the first and second authorizations.

A method, comprising:

• sending a first code value to a first integrated circuit in response to a request for access by the first integrated circuit to a memory location of a second integrated circuit;
• comparing a predetermined code value to a second code value generated by the first integrated circuit in response to the first code value;
• and
• allowing the first integrated circuit to access the memory location of the second integrated circuit if the second code value has a predetermined relationship to the predetermined code value.

A method, comprising:

• sending an address to a first integrated circuit;
• requesting a first code value from the first integrated circuit;
• generating a second code value from the first code value;
• sending the second code value to the first integrated circuit;
• and
• accessing a data-storage location of the first integrated circuit corresponding to the address after sending the second code value.

A method, comprising:

• obtaining a first authorization to access one of a plurality of protected memory locations in a first manner;
• obtaining a second authorization to access a first one of the memory locations in a second manner;
• and
• accessing the first one of the memory locations in the second manner after obtaining the first and second authorizations.