Address Translation Method and Apparatus

A method of performing address translation in a processor, comprising:

• recognizing an instruction configured to access a region in memory crossing a page boundary between first and second memory pages;
• translating a virtual address presented by the instruction into a physical address associated with the first memory page;
• and
• retrieving a physical address associated with the second memory page based on previously established information linking the virtual address to the physical address associated with the second memory page.

A processor, comprising circuitry configured to:

• recognize an instruction configured to access a region in memory crossing a page boundary between first and second memory pages;
• translate a virtual address presented by the instruction into a physical address associated with the first memory page;
• and
• retrieve a physical address associated with the second memory page based on previously established information linking the virtual address to the physical address associated with the second memory page.