Back to results
US 2008/0189489 A1Published application
Regularly occurring write back scheme for cache soft error reduction
AssigneeCisco Technology, Inc.
InventorSomnath Mitra
Life of this patent
Estimating the term…
Abstract
In one embodiment, a processor regularly writes one or more cache entries back to memory to reduce the likelihood of cache soft errors. The regularly occurring write backs operate independently of Least Recently Used (LRU) status of the entries so that all entries are flushed.
Claims20
A method, comprising:
- selecting one or more cache entries to be written to a remote memory at a first occurrence of a regularly occurring time interval, said selecting occurring independently of how recently the identified cache entries have been used;
- and
- writing the cache entries to the remote memory at the first occurrence of the regularly occurring time interval.
An apparatus comprising:
- one or more processors;
- and
- a memory coupled to the processors comprising instructions executable by the processors, the processor operable when executing the instructions to:
- perform unscheduled write backs of data stored in a cache in response to observing that the data is dirty and selected for write-over;
- receive a regularly occurring timing signal;
- and
- perform scheduled write backs of cache entries to memory whenever the timing signal is received regardless of how often the cache entries are accessed until data stored on the cache is fully backed up to a memory.
4 more elements
An apparatus comprising:
- means for performing a first type of write backs from a cache to a memory, the first type of write backs initiated in association with one or more processors writing to the cache;
- means for generating a triggering signal, the generation of the triggering signal being unassociated with the processors writing to either the cache or the memory during the first type of write backs;
- and
- means for performing a second type of write backs from the cache to the memory, the second type of write backs initiated in response to the triggering signal.
1 more element
Dependencies are inferred from the claim text.