Back to results
US 2008/0189480 A1Published application
Memory configured on a common substrate
AssigneeQimonda North America Corp.
InventorsJung Pill Kim, Jong-Hoon Oh, Oliver Kiehl, Josef Schnell, Klaus Hummler, Wayne Ellis, Octavian Beldiman, Lee Collins
Life of this patent
Estimating the term…
Abstract
A memory includes a first macro chip, a spine chip, and a common substrate. The common substrate is configured to pass signals between the first macro chip and the spine chip. The first macro chip, the spine chip, and the common substrate provide a memory.
Claims30
A memory comprising:
- a first macro chip;
- a spine chip;
- and
- a substrate configured to pass signals between the first macro chip and the spine chip,
- wherein the first macro chip, the spine chip, and the common substrate provide a memory.
2 more elements
A memory comprising:
- a memory array chip;
- a control logic chip;
- a reference voltage generator chip;
- and
- a printed circuit board configured to pass signals between the first memory array chip, the control logic chip, and the reference voltage generator chip,
- wherein the memory array chip, the control logic chip, the reference voltage generator chip, and the printed circuit board provide a dynamic random access memory.
3 more elements
A memory comprising:
- means for storing data;
- means for generating reference voltages;
- means for reading data from and writing data to the means for storing data;
- and
- a common substrate interconnecting the means for storing data, the means for generating reference voltages, and the means for reading data and writing data to provide a memory.
2 more elements
A method for fabricating a memory, the method comprising:
- providing a first macro chip;
- providing a spine chip;
- and
- coupling the first macro chip and the spine chip to a common substrate configured to pass signals between the first macro chip and the spine chip to provide a memory.
1 more element
A method for fabricating a memory, the method comprising:
- providing a memory array chip;
- providing a control logic chip;
- providing a reference voltage generator chip;
- and
- coupling the memory array chip, the control logic chip, and the reference voltage generator chip to a printed circuit board configured to pass signals between the memory array chip, the control logic chip, and the reference voltage generator chip to provide a dynamic random access memory.
2 more elements
Dependencies are inferred from the claim text.