Nonvolatile semiconductor memory device with advanced multi-page program operation

A multilevel flash memory programming multilevel data, said memory comprising:

• a memory cell array including a plurality of banks each having a plurality of memory blocks and a cache block, each of said memory blocks having a plurality of memory cells configured to store multilevel data;
• a page buffer communicating with and corresponding to each of said plurality of banks within the memory cell array;
• and
• a programming circuit for sequentially storing page data loaded into at least one of said page buffers in said corresponding cache blocks, said programming circuit configured to program said stored page data and a last loaded page data into respective corresponding banks.

A multilevel flash memory for programming multilevel data comprising:

• a memory cell array including a plurality of banks each having a plurality of memory banks and a cache block, each of said memory blocks having a plurality of memory cells configured to store multilevel data;
• a page buffer communicating with said memory array, said page buffer corresponding to each of said plurality of memory banks within the memory cell array;
• and
• a programming circuit for programming said memory banks except a last bank among said banks with page data, said page data loaded through said page buffer is programmed into each of said cache blocks such that when said page data for the last bank is loaded into the page buffer and said page data programmed into the respective cache blocks are copied back to corresponding page buffers, page data associated with all of said page buffers are programmed into respective corresponding banks.

A method of performing a programming of page data in a multilevel flash memory for which a memory cell array is divided into a plurality of banks, the method comprising:

• preparing a cache block corresponding to each of the plurality of banks to receive said data;
• programming page data into said cache blocks corresponding to all of said plurality of banks except a last of said plurality of banks, at high speed;
• and
• loading page data for said last of said plurality of banks and page data programmed into said cache block when said page data for the last of said plurality of banks is loaded.

A programming method in a multilevel flash memory for which a memory cell array is divided into a plurality of banks, the method comprising:

• preparing a cache block associated with each of said plurality of banks;
• sequentially programming cache blocks, except a cache block allocated to a last bank of said plurality of banks, with MSB page data sequentially loaded through corresponding page buffers, programming said MSB page data after an LSB page program is performed directly into a selected block without passing through a cache block;
• copying said MSB page data programmed in said cache blocks back to the corresponding page buffers in response to a predetermined program command after the MSB page data is loaded into the last page buffer;
• and
• simultaneously programming corresponding blocks of said banks with said MSB page data contained into all of said page buffers.