Multimodal memory controllers

Abstract

Design structures embodied in machine readable medium are provided. Embodiments of the design structures include a multimodal memory controller comprising: a transceiver circuit having at least one internal signal line, a first external signal line, a second external signal line, and a mode control signal line, the mode control signal line having asserted upon it a mode control signal, and the transceiver circuit configured to operate the external signal lines for single-ended signaling at a first voltage when the mode control signal is a first value and to operate the external signal lines for differential signaling at a second voltage when the mode control signal is a second value.

Dependencies are inferred from the claim text.