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AssigneeThomson Licensing
InventorsThierry Tapie, Serge Defrance, Luis Montalvo
Estimating the term…
A device (D2) is dedicated to the reconstruction of clock signals, for example within communication equipment (EQ2) of an IP network. This device (D2) comprises i) a phase-locked loop (BV) having a cut-off frequency dependent, on the one hand, on a configuration value making it possible to reconstruct clock signals according to a chosen clock frequency, and on the other hand, a chosen sampling frequency, and ii) control means (MC2) responsible for forcing the phase-locked loop (BV) to present a variable cut-off frequency according to a received operating mode indication.
Device (D1) for generating counter signals representative of clock signals, said device (D1) comprising i) clock means (MH1) arranged to deliver clock signals according to a so-called reference clock frequency, ii) a counter (C1) arranged to deliver a signal of periodic ramp representative of the number of clock signals delivered, and iii) a sampler (E1) arranged to sample said ramp signal at a chosen sampling frequency to form counter signals, wherein said clock means (MH1) are arranged to deliver clock signals according to at least one other clock frequency differing from said reference clock frequency, and in that it comprises control means (MC1) arranged to select one of the deliverable clock frequencies according to a received command and to define a sampling frequency equal to a reference sampling frequency multiplied by the value of the ratio between the selected clock frequency and the reference clock frequency.
Device for reconstructing clock signals (D2), comprising a phase-locked loop (BV) having a cut-off frequency dependent on i) a configuration value making it possible to reconstruct clock signals according to a chosen clock frequency, and ii) a chosen sampling frequency, said device comprising control means (MC2) arranged to force said phase-locked loop (BV) to present a variable cut-off frequency according to a received operating mode indication, wherein said phase-locked loop (BV) comprises i) comparison means (MCN) arranged to compare an external counter signal with a local counter signal and to deliver a comparison signal representative of the result of said comparison, ii) correction means (MCR) arranged to determine said configuration value from said comparison signal, iii) clock means (MH2) arranged to deliver clock signals according to the clock frequency defined by said configuration value, iv) a counter (C2) arranged to deliver a signal of periodic ramp representative of the number of clock signals delivered by said clock means (MH2), and v) a sampler (E2) arranged to sample said ramp signal according to the chosen sampling frequency to deliver said local counter signal, and in that said control means (MC2) are arranged to configure said correction means (MCR) so that they generate a configuration value forcing said clock means (MH2) to deliver clock signals having a clock frequency equal to a reference clock frequency multiplied by a ratio value dependent on a received operating mode indication, and to define for said sampler (E2) a chosen sampling frequency, equal to a reference sampling frequency multiplied by said ratio value.
Dependencies are inferred from the claim text.