Data recovery circuits using oversampling for best data sample selection
AssigneeInternational Business Machines Corporation
InventorVincent Vallet
Life of this patent
Estimating the term…
Loading patent…
AssigneeInternational Business Machines Corporation
InventorVincent Vallet
Estimating the term…
An improved data recovery circuit based on an oversampling technique to select the best data sample to be kept as the data to recover that is only based on accumulating the data edges (or transitions). The incoming serial data stream with jitter is oversampled in an oversampling circuit by means of the multiple phases of a reference clock (clk) to produce data samples. Each sample is compared to the sample(s) collected with the next clock phase(s) in an edge detector circuit to determine the presence of a data edge and the edge information is stored and accumulated in a data edge memory. A selection determination circuit uses the memorized edge information to indicate which sample is the farthest from the data edges. A selection validation circuit validates the selection to avoid false determination due to jitter and skew.
1-4. (canceled)
A method for recovering the data in an incoming data stream with jitter and skewed with respect to a reference clock by selecting the best data sample in a set of data samples obtained by oversampling said incoming data stream comprising the steps of:
Dependencies are inferred from the claim text.