Non-volatile memory with improved erasing operation

In a non-volatile memory having a plurality of memory cells, a method for performing an erase operation comprising:

• executing N cycles, each cycle includes a program phase and an erase phase, and wherein N is an integer greater than 1, the executing of each Nth cycle comprising:
• selecting a first set of memory cells for a program phase and selecting a second set of memory cells for an erase phase;
• the memory cells of the first and second sets initially having a threshold voltage at a first threshold voltage level;
• programming the memory cells of the first set such that their threshold voltage level increases to a second threshold level;
• and
• programming the memory cells of the second set such that their threshold voltage level increases to the second threshold level, and adjusting a first read voltage level to a second read voltage level.