High-endurance memory device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorYue-Der Chih
Life of this patent
Estimating the term…
Abstract
A memory device includes a set of memory cells, each of which is capable of being selected to generate a sensing current depending on a logic state thereof, and a set of reference cells, each of which is capable of being selected to generate a reference current. A sense amplifier is coupled to the memory cells and the reference cells for comparing the sensing current with the reference current to generate a signal representing the logic state of the selected memory cell. The memory cells and the reference cells are subject to the same operation cycles, such that a difference between the sensing current and the reference current remains a constant.
Claims18
A memory device comprising:
- a set of memory cells, each of which is capable of being selected to generate a sensing current depending on a logic state thereof;
- a set of reference cells, each of which is capable of being selected to generate a reference current, wherein the set of the memory cells and the reference cells are entirely erased before one or more of the memory cells are selected for a programming operation;
- and
- a sense amplifier coupled to the memory cells and the reference cells for comparing the sensing current with the reference current to generate a signal representing the logic state of the selected memory cell,
- wherein the memory cells that have not been selected for the programming operation are successively programmed before a page erase operation is executed, and
- wherein the memory cells and the reference cells are subject to the same operation cycles, such that a difference between the sensing current and the reference current remains a constant.
6-7. (canceled)
A method for maintaining a sensing margin of a memory device, comprising:
- selecting at least one memory cell from a set of memory cells to generate a sensing current depending on a logic state of the selected memory cell;
- selecting at least one reference cell from a set of reference cells to generate a reference current;
- erasing the memory cells and the reference cells entirely before one or more of the memory cells are selected for a programming operation;
- programming the memory cells that have not been selected for the programming operation before a page erase operation is executed;
- and
- comparing the sensing current with the reference current to generate a signal representing the logic state of the selected memory cell,
- wherein the memory cells and the reference cells are subject to the same operation cycles, such that a difference between the sensing current and the reference current remains a constant.
12-13. (canceled)
A memory device comprising:
- a set of memory cells, each of which is capable of being selected to generate a sensing current depending on a logic state thereof;
- a set of reference cells, each of which is capable of being selected to generate a reference current;
- and
- a sense amplifier coupled to the memory cells and the reference cells for comparing the sensing current with the reference current to generate a signal representing the logic state of the selected memory cell,
- wherein the set of the memory cells and the reference cells are entirely erased before one or more of the memory cells are selected for a programming operation,
- wherein the reference cells and the memory cells that have not been selected for the programming operation are successively programmed before a page erase operation is executed, thereby maintaining a difference between the sensing current and the reference current at a constant value.
Dependencies are inferred from the claim text.