Methods of fabricating integrated circuit devices including capacitors having high-aspect ratio support patterns and related devices

Abstract

A method of fabricating an integrated circuit device includes forming a plurality of lower capacitor electrodes vertically extending from a substrate. The plurality of lower capacitor electrodes respectively include an inner sidewall and an outer sidewall. At least one support pattern is formed vertically extending between ones of the plurality of lower capacitor electrodes from top portions thereof opposite the substrate and along the outer sidewalls thereof towards the substrate to a depth that is greater than a lateral distance between adjacent ones of the plurality of lower capacitor electrodes. A dielectric layer is formed on the support pattern and on outer sidewalls of the plurality of lower capacitor electrodes, and an upper capacitor electrode is formed on the dielectric layer. Related devices are also discussed.

Dependencies are inferred from the claim text.