Source driver circuit and display panel incorporating the same

A display panel, comprising:

• a pixel array, which comprises a plurality of row pixels;
• a timing controller for generating a clock signal, a first actuating signal and a second actuating signal;
• a vertical driver circuit, electrically coupled to one side of the pixel array, for sequentially providing a scan voltage to the row pixels to turn on the corresponding pixel;
• and
• a source driver circuit, which is electrically coupled to the other side of the pixel array and comprises:
• a plurality of digital-to-analog converting units;
• and
• a plurality of sampling-transmitting units each comprising:
• a first latch unit, which comprises a first sub-latch unit for receiving a first input enable signal and a first output enable signal, and a second sub-latch unit for receiving a second input enable signal and a second output enable signal, wherein the first and second input enable signals are enabled in a first period, and the first and second output enable signals are disabled so that the first sub-latch unit and the second sub-latch unit sample first pixel data and second pixel data, respectively;
• a second latch unit, which comprises a third sub-latch unit for receiving a third input enable signal and a third output enable signal, and a fourth sub-latch unit for receiving a fourth input enable signal and a fourth output enable signal, wherein the third and fourth input enable signals are enabled in a second period and the third and fourth output enable signals are disabled so that the third sub-latch unit and the fourth sub-latch unit sample third pixel data and fourth pixel data, respectively;
• and
• a transmission channel set for electrically coupling the first latch unit and the second latch unit to the corresponding
• digital-to-analog converting unit, wherein:
• in the second period, the first and second output enable signals are sequentially enabled, and the first and second input enable signals are disabled so that the first sub-latch unit and the second sub-latch unit sequentially output the first pixel data and the second pixel data to the corresponding digital-to-analog converting unit via the transmission channel set;
• and
• in a third period, the third and fourth output enable signals are sequentially enabled and the third and fourth input enable signals are disabled so that the third sub-latch unit and the fourth sub-latch unit are sequentially enabled to sequentially output the third pixel data and the fourth pixel data to the corresponding digital-to-analog converting unit via the transmission channel set.

A source driver circuit for use in a display panel, the source driver circuit comprising:

• a plurality of digital-to-analog converting units;
• and
• a plurality of sampling-transmitting units each comprising:
• a first sub-latch unit for receiving a first input enable signal and a first output enable signal, wherein in a first period, the first input enable signal is enabled and the first output enable signal is disabled so that the first sub-latch unit samples first pixel data;
• a second sub-latch unit for receiving a second input enable signal and a second output enable signal, wherein in a second period, the second input enable signal is enabled and the second output enable signal is disabled so that the second sub-latch unit samples second pixel data;
• and
• a transmission channel set for electrically coupling the first sub-latch unit and the second sub-latch unit to the corresponding digital-to-analog converting unit, wherein
• in the second period, the first output enable signal is enabled and the first input enable signal is disabled so that the first sub-latch unit outputs the first pixel data to the corresponding digital-to-analog converting unit via the transmission channel set;
• and
• in a third period, the second output enable signal is enabled and the second input enable signal is disabled so that the second sub-latch unit outputs the second pixel data to the corresponding digital-to-analog converting unit via the transmission channel set.