Variable-gain amplification circuit, receiver and receiver ic

A variable-gain amplification circuit including a parallel circuit connected between two output terminals of said variable-gain amplification circuit as a parallel circuit comprising a plurality of differential variable-gain amplifiers each having first, second, third and fourth MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) connected to each other by use of cascode coupling and each having a controllable gain, wherein

• the sources of said first and second MOSFETs are tied to a common connection point connected to a current source,
• an input signal is supplied to the gates of said first and second MOSFETs,
• the drains of said first and second MOSFETs are connected to the sources of said third and fourth MOSFETs respectively whereas the drains of said third and fourth MOSFETs are connected to said two output terminals respectively, a gain control voltage is supplied to the gates of both said third and fourth MOSFETs,
• when control is executed in order to lower said gain control voltage supplied to said gates of both said third and fourth MOSFETs, other control is also executed in order to raise a bias voltage applied to said gates of both said first and second MOSFETs, and
• said current source is controlled in order to carry out switching from a specific one of said variable-gain amplifiers to another one of said variable-gain amplifiers.