Dual Transconductance Amplifiers and Differential Amplifiers Implemented Using Such Dual Transconductance Amplifiers

A dual transconductance differential amplifier, the dual transconductance differential amplifier comprising:

• a first dual input operational amplifier, wherein the first dual input operational amplifier includes:
• a first input set, wherein the first input set is amplified by a first transconductance to form a first amplified signal;
• a second input set, wherein the second input set is amplified by a second transconductance to form a second amplified signal;
• and
• a first summation node, wherein the first summation node aggregates the first amplified signal with the second amplified signal to create a first aggregate amplified signal;
• a second dual input operational amplifier;
• a third input set, wherein the third input set is amplified by the first transconductance to form a third amplified signal;
• a fourth input set, wherein the fourth input set is amplified by the second transconductance to form a fourth amplified signal;
• and
• a second summation node, wherein the second summation node aggregates the third amplified signal with the fourth amplified signal to create a second aggregate amplified signal;
• wherein the first dual input operational amplifier and the second dual input operational amplifier are configured such that:
• to a common mode signal, an overall transconductance is the difference between the first transconductance and the second transconductance;
• and
• to a differential signal, the overall transconductance is the sum of the first transconductance and the second transconductance.

A dual transconductance differential amplifier, the dual transconductance differential amplifier comprising:

• a first dual input operational amplifier, wherein the first dual input operational amplifier includes:
• a first input set, wherein the first input set includes a first non-inverting input and a first inverting input, and wherein the first input set is amplified by a first transconductance to form a first amplified signal;
• a second input set, wherein the second input set includes a second non-inverting input and a second inverting input, and wherein the second input set is amplified by a second transconductance to form a second amplified signal;
• and
• a first summation node, wherein the first summation node aggregates the first amplified signal with the second amplified signal to create a first aggregate amplified signal;
• a second dual input operational amplifier;
• a third input set, wherein the third input set includes a third non-inverting input and a third inverting input, wherein the third input set is amplified by the first transconductance to form a third amplified signal;
• a fourth input set, wherein the fourth input set includes a fourth non-inverting input and a fourth inverting input, wherein the fourth input set is amplified by the second transconductance to form a fourth amplified signal;
• and
• a second summation node, wherein the second summation node aggregates the third amplified signal with the fourth amplified signal to create a second aggregate amplified signal;
• a positive differential input, wherein the positive differential input is electrically coupled to a non-inverting input of the first input set and to an inverting input of the fourth input set;
• a negative differential input, wherein the negative differential input is electrically coupled to an inverting input of the second input set and to a non-inverting input of the third input set;
• a first feedback resistor, wherein an output of the first dual input operational amplifier is electrically coupled to an inverting input of the first input set via the first feedback resistor and to a non-inverting input of the fourth input set via the first feedback resistor;
• and
• a second feedback resistor, wherein an output of the second dual input operational amplifier is electrically coupled to a non-inverting input of the second input set via the second feedback resistor and to an inverting input of the third input set via the second feedback resistor.