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US 2008/0185666 A1Published application
Field effect transistors including variable width channels and methods of forming the same
AssigneeSamsung Electronics Co., Ltd.
InventorsSeung-Han Yoo, Dae-Lim Kang, Young-Chan Lee
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Abstract
A field effect transistor includes a first substrate region having a channel region and a second substrate region where a heavily doped region is formed. The channel region includes a first portion having a first width and a second portion having a second width larger than the first width. Related fabrication methods are also described.
Claims32
A field effect transistor comprising:
- a substrate;
- a field insulation layer disposed in the substrate, the field insulation layer defining a first substrate region and a second substrate region spaced apart from each other;
- a gate on the first substrate region;
- a channel region defined in the first substrate region under the gate, the channel region comprising a first portion having a first width and a second portion having a second width, along a channel width direction that is transverse to a direction from the first substrate region to the second substrate region;
- a heavily doped region in the second substrate region;
- and
- a lightly doped region in the substrate surrounding a sidewall and a bottom surface of the heavily doped region,
- wherein the first portion is interposed between the second substrate region and the second portion, the first portion is adjacent to the field insulation layer between the first and the second substrate regions, and the first width is smaller than the second width.
5 more elements
A method of forming a field effect transistor comprising:
- forming a field insulation layer defining a first substrate region and a second substrate region spaced apart from each other in a substrate;
- forming a lightly doped region in the substrate;
- forming a gate on the first substrate region;
- and
- forming a heavily doped region in the second substrate region,
- wherein a channel region defined in the first substrate region under the gate comprises a first portion having a first width and a second portion having a second width in a channel width direction that is transverse to a direction from the first substrate region to the second substrate region, the first portion is interposed between the second substrate region and the second portion and is adjacent to the field insulation layer between the first and the second substrate regions, the first width is smaller than the second width, and the lightly doped region surrounds a sidewall and a bottom surface of the heavily doped region.
3 more elements
A field effect transistor comprising:
- a substrate;
- a field insulation layer in the substrate that is configured to define first and second substrate regions that are spaced apart from one another, the field insulation layer that defines the first substrate region having different widths at corresponding different lengths away from the second substrate region so that the first substrate region also has different widths at corresponding different lengths away from the second substrate region;
- a gate on at least a portion of the first substrate region that has different widths at corresponding different lengths away from the second substrate region;
- and
- a source/drain region in the second substrate region.
2 more elements
Dependencies are inferred from the claim text.