Buried Stress Isolation for High-Performance CMOS Technology
AssigneeInternational Business Machines Corporation
InventorsMeiKei Ieong, Zhibin Ren, Haizhou Yin
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AssigneeInternational Business Machines Corporation
InventorsMeiKei Ieong, Zhibin Ren, Haizhou Yin
Estimating the term…
A field effect transistor (FET) comprises a substrate; a buried oxide (BOX) layer over the substrate; a current channel region over the BOX layer; source/drain regions adjacent to the current channel region; a buried high-stress film in the BOX layer and regions of the substrate, wherein the high-stress film comprises any of a compressive film and a tensile film; an insulating layer covering the buried high-stress film; and a gate electrode over the current channel region, wherein the high-stress film is adapted to create mechanical stress in the current channel region, wherein the high-stress film is adapted to stretch the current channel region in order to create the mechanical stress in the current channel region; wherein the mechanical stress comprises any of compressive stress and tensile stress, and wherein the mechanical stress caused by the high-stress film causes an increased charge carrier mobility in the current channel region.
A field effect transistor (FET) comprising:
A method of forming a field effect transistor (FET), said method comprising:
A method of increasing a charge carrier mobility in a field effect transistor (FET), said method comprising:
A field effect transistor (FET) comprising:
Dependencies are inferred from the claim text.