Fets with self-aligned bodies and backgate holes
AssigneeInternational Business Machines Corporation
InventorsBrent A. Anderson, Andres Bryant, Edward J. Nowak, Richard Q. Williams
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AssigneeInternational Business Machines Corporation
InventorsBrent A. Anderson, Andres Bryant, Edward J. Nowak, Richard Q. Williams
Estimating the term…
A FET has a shallow source/drain region, a deep channel region, a gate stack and a back gate that is surrounded by dielectric. The FET structure also includes halo or pocket implants that extend through the entire depth of the channel region. Because a portion of the halo and well doping of the channel is deeper than the source/drain depth, better threshold voltage and process control is achieved. A back-gated FET structure is also provided having a first dielectric layer in this structure that runs under the shallow source/drain region between the channel region and the back gate. This first dielectric layer extends from under the source/drain regions on either side of the back gate and is in contact with a second dielectric such that the back gate is bounded on each side or isolated by dielectric.
A silicon on insulator (SOI) field effect transistor (FET) comprising:
A silicon on insulator (SOI) field effect transistor (FET) comprising:
A method of making a silicon on insulator (SOI) field effect transistor (FET) comprising:
A self-aligning method of making a silicon on insulator (SOI) field effect transistor (FET) comprising:
Dependencies are inferred from the claim text.