Memory Device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsKensuke Yoshizumi, Noriko Harima
Life of this patent
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Abstract
A memory device is provided, which includes a first conductive layer, a second conductive layer, and a memory layer interposed between the first conductive layer and the second conductive layer. The memory layer includes a first portion and a second portion, each of which includes at least a nanoparticle. The nanoparticle includes a conductive material coated with an organic film. The first portion is in contact with the first conductive layer and the second conductive layer, and a side surface of the first portion is surrounded by the second portion.
Claims32
A memory device comprising:
- a first conductive layer;
- a second conductive layer;
- and
- a memory layer interposed between the first conductive layer and the second conductive layer, wherein:
- the memory layer includes a first portion and a second portion, each of which includes at least a nanoparticle including a conductive material coated with an organic film,
- the first conductive layer is electrically connected to the second conductive layer through the first portion,
- the first portion is in contact with the first conductive layer and the second conductive layer, and
- a side surface of the first portion is surrounded by the second portion.
A memory device comprising:
- a first conductive layer;
- a second conductive layer;
- a memory layer interposed between the first conductive layer and the second conductive layer, and
- a transistor electrically connected to a memory element including the first conductive layer, the second conductive layer, and the memory layer, wherein:
- the memory layer includes a first portion and a second portion, each of which includes at least a nanoparticle including a conductive material coated with an organic film,
- the first conductive layer is electrically connected to the second conductive layer through the first portion,
- the first portion is in contact with the first conductive layer and the second conductive layer, and
- a side surface of the first portion is surrounded by the second portion.
A memory device comprising:
- a first conductive layer;
- a second conductive layer;
- and
- a memory layer interposed between the first conductive layer and the second conductive layer, wherein:
- the memory layer includes a first portion and a second portion, each of which includes nanoparticles each including a conductive material coated with an organic film,
- the nanoparticles included in the first portion are welded,
- the first portion is in contact with the first conductive layer and the second conductive layer, and
- a side surface of the first portion is surrounded by the second portion.
A memory device comprising:
- a first conductive layer;
- a second conductive layer;
- a memory layer interposed between the first conductive layer and the second conductive layer, and
- a transistor electrically connected to a memory element including the first conductive layer, the second conductive layer, and the memory layer, wherein:
- the memory layer includes a first portion and a second portion, each of which includes nanoparticles each including a conductive material coated with an organic film,
- the nanoparticles included in the first portion are welded,
- the first portion is in contact with the first conductive layer and the second conductive layer, and
- a side surface of the first portion is surrounded by the second portion.
Dependencies are inferred from the claim text.