Non-volatile semiconductor memory

A non-volatile semiconductor memory comprising:

• a plurality of memory cell arrays having a number-of-rewrites storage region which stores a number of data rewrites of data;
• a plurality of sense amplifiers/data registers provided to corresponding bit lines in the memory cell arrays;
• and
• a plurality of row decoders provided in correspondence to the memory cell arrays,
• wherein the number-of-rewrites storage region included in a first memory cell array stores the number-of-rewrites of data corresponding to a second memory cell array different from the first memory cell array by executing writing to cell transistors of the number-of-rewrites storage region at a potential difference between gates and channels of the cell transistors smaller than an ordinary potential difference for writing of data.