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US 2008/0173987 A1Published application
Semiconductor device
AssigneeElpida Memory, Inc.
InventorsKazutaka Koshiishi, Mitsuaki Katagiri, Satoshi Isa
Life of this patent
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Abstract
A high dielectric loss tangent layer is provided in a dielectric layer between a power-supply plane and a ground plane. The high dielectric loss tangent layer is arranged such that its edge is located between the edge of the power-supply plane and the edge of the ground plane. The edge of the high dielectric loss tangent layer is preferably separated by a predetermined distance or more from the edge of the power-supply plane or the edge of the ground plane which is located on the inner side.
Claims6
A semiconductor device, comprising:
- a substrate having a ground plane and a power-supply plane arranged to face each other with a dielectric layer interposed between the ground plane and the power-supply plane, an edge of the ground plane being offset from an edge of the power-supply plane in a direction orthogonal to a thickness direction,
- wherein a high dielectric loss tangent layer having a higher tan δ than a periphery is provided in the dielectric layer between the edge of the ground plane and the edge of the power-supply plane in the direction orthogonal to the thickness direction, and
- an edge of the high dielectric loss tangent layer located outside in the direction orthogonal to the thickness direction is positioned between the edge of the ground plane and the edge of the power-supply plane in the direction orthogonal to the thickness direction.
Dependencies are inferred from the claim text.