Semiconductor memory device and method for manufacturing the same

A method for manufacturing a semiconductor memory device, the method comprising:

• forming a gate insulating film on a semiconductor substrate having a first region in which a first circuit element having a double-layer gate structure is formed and a second region in which a second circuit element having a single-layer gate structure is formed;
• forming, in the first region, a first gate electrode layer on the gate insulating film;
• forming, in the second region, a third gate electrode layer having a thickness larger than that of the first gate electrode layer on the gate insulating film;
• forming, in the first and second regions, the element isolation grooves so as to penetrate through the first and third gate electrode layers and the gate insulating film and so as to reach into the semiconductor substrate;
• forming, in the first and second regions, first and second element isolation insulating films in the element isolation grooves, respectively;
• removing upper portions of the first and second element isolation insulating films so that upper surfaces of the first and second element isolation insulating films are aligned with an upper surface of the third gate electrode layer;
• selectively removing the upper portions of the first element isolation insulating films so that the upper surfaces of the first element isolation insulating films are lower than an upper surface of the first gate electrode layer;
• forming an inter-electrode insulating film on the first gate electrode layer and on the first element isolation insulating films;
• removing a natural oxide film formed on a surface of the third gate electrode layer;
• forming a second gate electrode layer on the inter-electrode insulating film;
• and
• forming a fourth gate electrode layer on the third gate electrode layer and on the second element isolation insulating films.

A semiconductor memory device comprising:

• a semiconductor substrate;
• a gate insulating film formed on the semiconductor substrate;
• a double-layer gate electrode including:
• a first gate electrode that has a first thickness and that is formed on the gate insulating film,
• a first inter-electrode insulating film formed on the first gate electrode, and
• a second gate electrode formed on the first inter-electrode insulating film;
• and
• a single-layer gate electrode including:
• a third gate electrode that has a second thickness larger than the first thickness and that is formed on the gate insulating film, and
• a fourth gate electrode formed on the third gate electrode.