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US 2008/0164615 A1Published application
Connection between an I/O region and the core region of an integrated circuit
AssigneeSanDisk Technologies LLC
InventorsPaul Lassa, Paul Paternoster, Brian Cheung
Life of this patent
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Abstract
A connection between a first circuit within an I/O region of an integrated circuit chip and a second circuit within a core region of the chip. The first circuit is connected to a bonding pad through a first conductor in a first layer of an I/O region. The second circuit is connected to the bonding pad through a second conductor in a second layer of an I/O region above the first layer.
Claims24
An integrated circuit chip comprising:
- a core region;
- an I/O region between the core region and an edge of the chip, wherein the I/O region includes first and second conductors arranged in first and second layers, respectively;
- a bonding pad within the I/O region, wherein the bonding pad is electrically connected to the first and second conductors;
- a first circuit within the I/O region, wherein the first circuit is connected to said first conductor;
- and
- a second circuit within the core region, wherein the second circuit is connected to the second conductor.
3 more elements
An integrated circuit chip comprising:
- a core region;
- an I/O region between the core region and an edge of the chip, wherein the I/O region includes a first conductor and a second conductor vertically separated from the first conductor;
- a bonding pad within the I/O region, wherein the bonding pad is electrically connected to the first and second conductors;
- a first circuit within the I/O region, wherein the first circuit is connected to said first conductor;
- and
- a second circuit within the core region, wherein the second circuit is connected to the second conductor.
3 more elements
Dependencies are inferred from the claim text.