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US 2008/0164534 A1Published application
Self-aligned contacts to source/drain regions
OwnerYi DINGinventor
Life of this patent
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Abstract
In some embodiments, when etching a dielectric to form a self-aligned contact opening to a source/drain region (160) of a transistor, the gate structure (220) is protected on top with a non-conformal layer (M3), possibly silicon, deposited so that it is thicker over the gate than over the source/drain region. The silicon may be insulated from the gates by another dielectric layer (M2). When the non-conformal layer is etched over the source/drain region, it may also be etched on top of the gate structure, but the gate structure remains protected due to the greater thickness of the non-conformal layer.
Claims7
An integrated circuit comprising:
- one or more gate structures, each said gate structure comprising at least one conductive gate;
- one or more first source/drain regions, each said first source/drain region being adjacent to a sidewall of at least one of said one or more gate structures;
- a first dielectric overlaying each said gate structure;
- a first layer comprising silicon and overlaying a top of each said gate structure, the first layer being separated from each said conductive gate by the first dielectric;
- a second dielectric overlaying each said gate structure and having one or more openings therethrough, each said opening overlying a respective one of said first source/drain regions;
- one or more conductive contacts, each conductive contact having at least a portion located in a respective one of said one or more openings, the contact electrically contacting the respective first source/drain region in the opening, the contact being insulated from each the conductive gate of each gate structure adjacent to the contact.
3 more elements
Dependencies are inferred from the claim text.