Method to achieve a low cost transistor isolation dielectric process module with improved process control, process cost, and yield potential
AssigneeSpansion LLC
InventorsChris A. Nauert, Kelley Kyle Higgins, Sr.
Life of this patent
Estimating the term…
Abstract
A method of processing a semiconductor structure is provided. The method includes forming a polish stop layer over one or more features on a substrate; forming a first dielectric layer over the polish stop layer, a valley portion of the first dielectric layer being just above a top of the polish stop layer; and polishing the dielectric layer down to the top of the polish stop layer. By forming a just enough dielectric layer to allow gap-fill on the substrate and polishing the dielectric layer down to the top of the polish stop layer, the method can reduce the cost and controls associated with forming the first dielectric layer.
Claims20
A method of improving isolation between one or more features on a semiconductor structure, comprising:
- forming a polish stop layer over one or more features on a substrate;
- forming a first dielectric layer over the polish stop layer, a valley portion of the first dielectric layer being just above a top of the polish stop layer;
- and
- polishing the first dielectric layer down to the top of the polish stop layer to form a substantially planar surface.
A method of processing a semiconductor structure, comprising:
- forming a polish stop layer over one or more transistors on a substrate;
- forming a first dielectric layer over the polish stop layer, a valley portion of the first dielectric layer being just above a top of the polish stop layer;
- and
- polishing the first dielectric layer until a portion of the top of the polish stop layer is exposed.
A semiconductor structure, comprising:
- one or more features on a substrate;
- a polish stop layer over the one or more features;
- a first dielectric layer over the polish stop layer, a top surface of the first dielectric layer being substantially coplanar with a portion of a top surface of the polish stop layer, and
- a second dielectric layer over the first dielectric layer, the second dielectric layer comprising material that is different from the first dielectric layer material.
Dependencies are inferred from the claim text.