Structure of semiconductor device for decreasing chip area and manufacturing method thereof

Abstract

A method of manufacturing a semiconductor device for decreasing a chip area by changing a connecting structure of pull up transistors and pull down transistors are disclosed. The semiconductor device can include pull up and pull down transistors including a first pull down transistor, a first pull up transistor, a second pull up transistor and a second pull down transistor, the first pull down transistor, the first pull up transistor, the second pull up transistor and the second pull down transistor being sequentially arranged in a series form on a SRAM, and line type contacts and metal lines formed on the respective pull up and pull down transistors. The line type contacts formed on the first pull down transistor and the first pull up transistor are connected to each other by the metal lines to connect an inverter that includes the first pull down transistor and the first pull up transistor to an opposite inverter, and the line type contacts formed on the second pull up transistor and the second pull down transistor are connected to each other by the metal lines to connect an inverter that includes the second pull up transistor and the second pull down transistor to an opposite inverter.

Dependencies are inferred from the claim text.