Eeprom cell with adjustable barrier in the tunnel window region
AssigneeAtmel Corporation
InventorBohumil Lojek
Life of this patent
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Abstract
An electrically programmable memory cell and corresponding method for fabricating the same, provide a reduced electron tunneling threshold to reduce parasitic substrate currents during cell programming. A floating gate of the cell is formed over an injector dopant region diffused within and encompassed by a first dopant region. Both dopant regions are situated beneath a self-aligned tunneling window of the floating gate. The dopant regions are each high concentration dopants and of complementary species to one another. The injector dopant region produces an increase in surface potential that lowers a tunneling barrier height and produces the lower electron tunneling threshold.
Claims21
A method of fabricating an electronic integrated circuit device on a first surface of a substrate, the method comprising:
- forming a first dielectric film layer over the first surface of the substrate;
- forming at least one further dielectric film layer over the first dielectric and creating a first aperture in the at least one further dielectric film layer, the first aperture having sidewalls that are non-parallel to the first surface of the substrate;
- etching a portion of the first dielectric film layer underlying the first aperture to form a tunneling window;
- creating a first dopant region formed substantially within an upper portion of the substrate underlying the first aperture;
- forming spacers on the sidewalls of the first aperture such that a distance between spacers on opposing sidewalls of the first aperture is less than a limit of optical photolithography, the opposing spacers thus forming a second aperture;
- and
- creating a second dopant region formed substantially within an upper portion of the substrate underlying the second aperture, the second dopant region being self-aligned with the second aperture.
A method of fabricating an electronic integrated circuit device, comprising:
- providing a substrate, the substrate being substantially comprised of silicon and having a first surface;
- forming a first dielectric film layer over the first surface of the substrate;
- forming at least one further dielectric film layer over the first dielectric film layer and creating a first aperture in the at least one further dielectric film layer, the first aperture having sidewalls that are non-parallel to the first surface of the substrate;
- etching a portion of the first dielectric film layer underlying the first aperture thus forming a tunneling window;
- creating a first dopant region formed substantially within an upper portion of the substrate underlying the first aperture;
- forming a spacer film layer over the at least one further dielectric film layer and a portion of the first dielectric film layer underlying the first aperture;
- etching regions of the spacer film layer that are essentially parallel to the first surface of the substrate while leaving regions of the spacer film layer that are essentially perpendicular to the first surface of the substrate, to create spacers on the sidewalls of the first aperture, a distance between spacers on opposing sidewalls of the first aperture being less than a limit of optical photolithography, a second aperture formed by the opposing spacers;
- and
- creating a second dopant region formed substantially within a portion of the substrate underlying the second aperture and within the first dopant region, the second dopant region being self-aligned with the second aperture.
A memory device, comprising:
- a floating gate forming a portion of the memory device, the floating gate being comprised substantially of a first semiconducting material and being constructed over a substrate;
- a gate dielectric material interposed between the floating gate and a first surface of the substrate;
- a recess etched in an upper portion of the gate dielectric material to form a tunneling window;
- a first dopant region formed in relationship to the tunneling window substantially within an upper portion of the substrate and underlying a portion of the floating gate;
- a spacer region formed on the sidewalls of the first aperture such that a distance between spacers on opposing sidewalls of the first aperture is less than a limit of optical photolithography, the opposing spacers thus forming a second aperture;
- and
- an injector dopant region disposed in close proximity to and self-aligned with the second aperture, the injector dopant region encompassed by the first dopant region.
Dependencies are inferred from the claim text.