Insulated gate bipolar transistor with enhanced conductivity modulation

A p-type insulated gate bipolar transistor (IGBT) device comprising:

• a emitter, collector, and gate;
• a n+ doped injecting layer coupled to the emitter;
• a p− doped drift layer disposed on the n+ doped injecting layer;
• a first n well region disposed on the p− doped drift layer, wherein the p− doped drift layer located between the n+ doped injecting layer and the first n well region;
• a p+ region disposed in the first n well region, wherein the gate is disposed over a portion of the first n well region with a gate insulating film interposed there between and wherein the collector is in contact with the p+ region and a portion of the first n well region;
• and
• an enhanced modulation layer disposed within a portion of the p− doped drift layer, wherein the enhanced modulation layer contains a higher carrier concentration than the p− doped drift layer and if the IGBT device is in an on state, the enhanced modulation layer decreases a size of a depletion region formed around the first n well region, and holes, traveling from the p+ region towards the emitter, are spread laterally and uniformly in the p− doped drift layer.

A method for fabricating a bi-polar transistor having an enhanced modulation layer, the method comprising:

• growing a drift layer region on a doped substrate;
• growing an enhanced modulation layer in the drift layer region of the bi-polar transistor;
• implanting p well regions;
• and
• implanting n+ regions in the p well regions.

A method for fabricating a bi-polar transistor having an enhanced modulation layer, the method comprising:

• growing a drift layer region on a doped substrate;
• growing an enhanced modulation layer in the drift layer region of the bi-polar transistor;
• implanting n well regions;
• and
• implanting p+ regions in the n well regions.