Semiconductor test system
AssigneeYokogawa Electric Corporation
InventorTatsuyuki Agata
Life of this patent
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Abstract
This invention provides a semiconductor test system including a test pattern generating portion for generating a test pattern data including a test signal for testing a device under test, at a predetermined timing, a driver for inputting the test pattern data generated by the test pattern generating portion into the device under test by way of a transmission line, and an adjustment DA converter for setting a voltage value of a high level or a low level signal inputted by the driver, to a voltage value of an adjustment high level or an adjustment low level adjusted in accordance with a characteristic of the transmission line.
Claims10
A semiconductor test system comprising:
- a test pattern generating portion for generating a test pattern data including a test signal for testing a device under test, at a predetermined timing;
- a driver for inputting the test pattern data generated by the test pattern generating portion into the device under test by way of a transmission line;
- and
- an adjustment DA converter for setting a voltage value of a high level or a low level signal inputted by the driver, to a voltage value of an adjustment high level or an adjustment low level adjusted in accordance with a characteristic of the transmission line.
A semiconductor test system comprising:
- a test pattern generating portion for generating a test pattern data including a test signal for testing a device under test, at a predetermined timing;
- a driver for inputting the test pattern data generated by the test pattern generating portion into the device under test by way of a transmission line;
- a first DA converter for setting a voltage value of a signal of a high level inputted by the driver;
- a second DA converter for setting a voltage value of a signal of a low level inputted by the driver;
- a first adjustment DA converter for setting the voltage value of the signal of the high level inputted by the driver, to a voltage value of an adjustment high level adjusted in accordance with a characteristic of the transmission line in rising from the low level to the high level;
- and
- a second adjustment DA converter for setting the voltage value of the signal of the low level inputted by the driver, to a voltage value of an adjustment low level adjusted in accordance with the characteristic of the transmission line in falling from the high level to the low level.
A semiconductor test system comprising:
- a test pattern generating portion for generating a test pattern data including a test signal for testing a device under test, at a predetermined timing;
- a driver for inputting the test pattern data generated by the test pattern generating portion into the device under test by way of a transmission line;
- a first DA converter for setting a voltage value of a signal of a high level inputted by the driver;
- a second DA converter for setting a voltage value of a signal of a low level inputted by the driver;
- a first adjustment DA converter for setting the voltage value of the signal of the high level inputted by the driver, to a voltage value of an adjustment high level higher than the high level set by the first DA converter in rising from the low level to the high level;
- and
- a second adjustment DA converter for setting the voltage value of the signal of the low level inputted by the driver, to a voltage value of an adjustment low level lower than the low level set by the second DA converter in falling from the high level to the low level.
Dependencies are inferred from the claim text.