Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer

A method of making a semiconductor chip with improved resistance to reverse engineering, said method comprising:

• a. forming a plurality of transistors in a semiconductor substrate, the transistors having sidewall spacers with LDD regions formed under the sidewall spacers and also having active regions, at least some of the active regions of certain ones of said transistors being disposed near adjacent active regions of certain other one of said transistors, a dopant density of the LDD regions being less than a dopant density of the active regions;
• and
• b. programmably interconnecting the at least some active regions with adjacent active regions with ambiguous interconnection features, the ambiguous interconnection features each comprising a channel formed in the semiconductor substrate with a dopant density having the same as the dopant density of the LDD regions, with selected ones of the channels having a conductivity type supporting electrical communication between interconnected active regions and with other selected ones of the channels being formed of a conductivity type inhibiting electrical communication between nearby active regions, but ambiguously appearing to a reverse engineer as supporting electrical communication.