Power consumption peak estimation program for LSI and device therefor

A power consumption peak estimation program estimating a power consumption, the program causing a computer to construct:

• a counter-added netlist generating unit, which generates, from the netlist, a counter-added netlist in which a counter counting the number of changes of a gated clock is added to a gated clock buffer within the netlist;
• a primary processing unit, which executes logical simulation on the counter-added netlist throughout a first time period, and extracts a counter value of the gated clock for every predetermined section within the first time period;
• a narrowed section determining unit, which determines a narrowed section which is composed of one or a plurality of sections in which switching activity of the gated clock, which is obtained from the counter value extracted by the primary processing unit, is higher than the switching activity in other sections;
• a secondary processing unit, which executes logical simulation on the netlist throughout the narrowed section to extract signal waveform data for every clock cycles in the narrowed section;
• and
• a power consumption generating unit, which generates power consumption data corresponding to the clock cycles, from the signal waveform data extracted by the secondary processing unit.

A power consumption peak estimation device estimating a power consumption peak, the power consumption peak estimation device comprising:

• a primary processing unit, which executes logical simulation on the netlist throughout a first time period to extract operation data of a gated clock for every predetermined section within the first time period;
• a secondary processing unit, which executes logical simulation on the netlist throughout a narrowed section to extract signal waveform data for every clock cycles in the narrowed section, the narrowed section being composed of one or a plurality of sections in which the switching activity of the gated clock, which is obtained from the operation data extracted by the primary processing unit, is higher than the switching activity in other sections;
• and
• a power consumption generating unit, which generates power consumption data corresponding to the clock cycles, from the signal waveform data extracted by the secondary processing unit.

A power consumption peak estimation device estimating a power consumption, the power consumption peak estimation device comprising:

• a counter-added netlist generating unit, which generates, from the netlist, a counter-added netlist in which a counter counting the number of changes of a gated clock is added to a gated clock buffer within the netlist;
• a primary processing unit, which executes logical simulation on the counter-added netlist throughout a first time period, and extracts a counter value of the gated clock for every predetermined section within the first time period;
• a narrowed section determining unit, which determines a narrowed section which is composed of one or a plurality of sections in which switching activity of the gated clock, which is obtained from the counter value extracted by the primary processing unit, is higher than the switching activity in other sections;
• a secondary processing unit, which executes logical simulation on the netlist throughout the narrowed section to extract signal waveform data for every clock cycles in the narrowed section;
• and
• a power consumption generating unit, which generates power consumption data corresponding to the clock cycles, from the signal waveform data extracted by the secondary processing unit.