Fluorine plasma treatment of high-k gate stack for defect passivation
AssigneeApplied Materials, Inc.
InventorsPhilip Allan Kraus, Christopher Olsen, Khaled Z. Ahmed
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AssigneeApplied Materials, Inc.
InventorsPhilip Allan Kraus, Christopher Olsen, Khaled Z. Ahmed
Estimating the term…
Embodiments of the present invention generally provide a method for forming a dielectric material with reduced bonding defects on a substrate. In one embodiment, the method comprises forming a dielectric layer having a desired thickness on a surface of a substrate, exposing the substrate to a low energy plasma comprising a fluorine source gas to form a fluorinated dielectric layer on the substrate without etching the dielectric layer, and forming a gate electrode on the substrate. In certain embodiments, the fluorine source gas is a carbon free gas. In certain embodiments, the method further comprises co-flowing a gas selected from the group consisting of argon, helium, N2, O2, and combinations thereof with the fluorine source gas.
A method for forming a semiconductor device, comprising:
A method of forming a high-k gate stack, comprising:
Dependencies are inferred from the claim text.