Methods of Forming Fine Patterns In Integrated Circuits Using Atomic Layer Deposition

A method of forming a fine pattern in an integrated circuit substrate, the method comprising:

• forming an insulating layer on the integrated circuit substrate;
• sequentially forming a first hard mask layer and a second hard mask layer on the insulating layer, the second hard mask layer having an etch selectivity with respect to the first hard mask layer;
• forming a first photoresist pattern on the second hard mask layer, the first photoresist pattern having a first line width and a first pitch;
• forming a mask material layer on the first photoresist pattern and the second hard mask layer by atomic layer deposition, the mask material layer including a material harder than the second hard mask layer;
• etching the mask material layer until the first photoresist pattern is exposed in order to form a mask pattern on side walls of the first photoresist pattern, the mask pattern having a second pitch that is less than the first pitch;
• etching a portion of the second hard mask layer using the mask pattern;
• forming a second photoresist pattern on the second hard mask layer, the second photoresist pattern partially exposing the etched portion of the second hard mask layer;
• etching the partially exposed portion of the second hard mask layer using the second photoresist pattern until the first hard mask layer is exposed, so as to form a second hard mask pattern;
• etching the first hard mask layer using the second hard mask pattern as a mask to form a first hard mask pattern;
• and
• etching the insulating layer using the first hard mask pattern as a mask to form a contact hole.

A method of forming a fine pattern in an integrated circuit substrate, the method comprising:

• forming a sacrificial pattern on the integrated circuit substrate, the sacrificial pattern including tops and side walls;
• atomic layer depositing a mask material layer on the sacrificial pattern, including on the tops and the side walls thereof and on the integrated circuit substrate therebetween;
• etching the mask material layer that was atomic layer deposited to expose the tops and the integrated circuit substrate therebetween, such that a mask material pattern remains on the side walls;
• removing the sacrificial pattern;
• and
• etching the integrated circuit substrate through the mask material pattern that remains.