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US 2008/0076036 A1Published application
Mask and method for patterning a semiconductor wafer
AssigneeInfineon Technologies AG
InventorHenning Haffner
Life of this patent
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Abstract
A mask and method for patterning a semiconductor wafer is disclosed. A mask set is fabricated on a transparent substrate. A mask layer comprising mask region elements that transmit light is disposed on the substrate, wherein each mask element is segmented into a plurality of segments.
Claims40
A method of making a semiconductor device, the method comprising:
- providing a mask with a pattern formed thereon, the mask including a first mask layer comprising mask region elements, wherein each mask element is segmented into a plurality of segments;
- providing a semiconductor wafer having a resist layer formed thereon;
- irradiating the resist layer through the mask to expose an upper surface of the wafer thereby forming a resulting pattern;
- and
- performing a process to affect the upper surface of the wafer.
2 more elements
A method of making a semiconductor device, the method comprising:
- providing a mask with a pattern formed thereon, the pattern including at least two substantially parallel edges, the substantially parallel edges being separated by a region of a first tone value, the region of the first tone value being divided into a plurality of segments, each segment separated from a neighboring segment by a blocking region, the blocking region comprising a region of a second tone value, wherein the second tone value is opposite of the first tone value;
- providing a semiconductor wafer having a resist layer formed thereon;
- irradiating the resist layer through the mask to expose an upper surface of the wafer forming a resulting pattern;
- removing a portion of the resist based upon the resulting pattern;
- and
- performing a process to affect the upper surface of the wafer, a portion of the upper surface being affected being related to the resulting pattern.
3 more elements
A method for generating a mask pattern, the method comprising:
- receiving a first mask pattern from a given target pattern input;
- searching for critical structures within the first mask pattern, wherein critical structures comprise lines and spaces within the first mask pattern below a critical dimension;
- identifying correctable mask elements from the results of the searching for critical structures;
- determining segment dimensions of the correctable mask elements based on a predetermined algorithm;
- and
- generating a second mask pattern incorporating the determined segment dimensions.
3 more elements
A method of making a semiconductor device, the method comprising:
- providing an alternating phase shift mask layout with a pattern formed thereon, the pattern including first, second and third pair of substantially parallel edges, the first pair being separated from the second pair by a first transmissive region that transmits light at a first phase and the second pair being separated from the third pair by a second transmissive region that transmits light at a second phase, both the first and second transmissive regions being divided into a plurality of segments, each segment separated from a neighboring segment by a blocking region, the blocking region comprising an opaque or semitransparent feature;
- providing a semiconductor wafer having a resist layer formed thereon;
- irradiating the resist layer through the alternating phase shift mask to expose an upper surface of the wafer thereby forming a resulting pattern, the resulting pattern including the first, second and third substantially parallel pairs of edges;
- and
- performing a process to affect the upper surface of the wafer in a pattern based upon the resulting pattern.
2 more elements
A semiconductor mask comprising:
- a transparent substrate;
- and
- a mask layer comprising adjacent mask region elements that transmit light disposed on the substrate, wherein each mask element is segmented into a plurality of segments.
Dependencies are inferred from the claim text.