Multi-block memory device erasing methods and related memory devices

A method of erasing a flash memory device that includes a plurality of memory blocks, the method comprising:

• determining a number of memory blocks that are to be simultaneously erased;
• setting a slope at which an erasing voltage rises based on a value of the determination;
• and
• supplying a substrate in which the memory blocks are formed with the erasing voltage which rises at the set slope.

A flash memory device comprising:

• a plurality of memory blocks in a semiconductor substrate;
• a first circuit that is configured to determine a number of the plurality of memory blocks that are to be erased;
• an voltage generator that is configured to generate an erasing voltage that is applied to the semiconductor substrate;
• and
• a control circuit that is configured to perform multi-block erasing operations in which at least two memory blocks are simultaneously erased,
• wherein the control circuit is configured to control the voltage generator, based at least in part on the determination as to the number of memory blocks that are to be erased, to apply the erasing voltage to the semiconductor substrate for approximately the same time regardless of the number of the memory blocks that are to be erased.