Gallium nitride high electron mobility transistor having inner field-plate for high power applications

Abstract

A gallium nitride high electron mobility transistor, in which an inner field-plate is disposed between the gate and drain of the high electron mobility transistor, so that an electric field is distributed between gate and drain regions to reduce a peak value and to reduce gate leakage current while maintaining high frequency performance, thus obtaining a high breakdown voltage, reducing the capacitance between the gate and the drain attributable to a shielding effect, and improving linearity and high power and high frequency characteristics through variation in the input voltage of the inner field-plate. The gallium-nitride high electron mobility transistor includes a gallium nitride buffer layer. An aluminum gallium-nitride barrier layer is formed on the buffer layer. A source electrode is placed on the barrier layer. A drain electrode is placed on the barrier layer to be spaced apart from the source electrode. A gate electrode is placed on a top of the barrier layer to be spaced apart from the source electrode and the drain electrode. A dielectric layer is deposited on the top of the barrier layer. An electric field electrode is formed on the dielectric layer located on the gate electrode. An inner field-plate is formed in the dielectric layer to be spaced apart from the gate electrode and the drain electrode.

Dependencies are inferred from the claim text.