US 2008/0073656 A1 · LOW TEMPERATURE POLYSILICON THIN FILM TRANSISTOR

Abstract

A low temperature polysilicon thin film transistor and method of manufacturing the same is provided. The low temperature polysilicon thin film transistor comprises a channel region. Among others, one feature of the method according to the present invention is the performance of a plasma treatment to adjust the threshold voltage of the low temperature polysilicon thin film transistor. Because the threshold voltage of the low temperature polysilicon thin film transistor can be adjusted through a plasma treatment, the manufacturing process is more flexible.

Claims11

Dependent claims

A low temperature polysilicon thin film transistor, comprising a polysilicon layer, a gate and a gate insulation layer, wherein the gate insulation layer is positioned between the gate and the polysilicon layer, the polysilicon layer has a channel region, and the concentration of oxygen within the channel region is between 1E19 to 1E23 atoms/cc while the concentration of hydrogen within the channel region is between 5E16 to 1E19 atoms/cc.

Dependencies are inferred from the claim text.

Facts

Application

11/951,336Filed 6 Dec 2007

Priority

TW 9210876916 Apr 2003

Published

27 Mar 2008

Term ends

Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10D 86/0221
Of multiple TFTs: comprising manufacture, treatment or patterning of TFT semiconductor bodies
H10D 30/0314
Characterised by the gate electrodes: of lateral top-gate TFTs comprising only a single gate
H10D 30/0321
Of thin-film transistors [TFT]: comprising silicon, e.g. amorphous silicon or polysilicon
H10D 86/0231
Of multiple TFTs: using masks, e.g. half-tone masks

Abstract

Facts

Application

11/951,336Filed 6 Dec 2007

Priority

TW 9210876916 Apr 2003

Published

27 Mar 2008

Term ends

Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10D 86/0221
Of multiple TFTs: comprising manufacture, treatment or patterning of TFT semiconductor bodies
H10D 30/0314
Characterised by the gate electrodes: of lateral top-gate TFTs comprising only a single gate
H10D 30/0321
Of thin-film transistors [TFT]: comprising silicon, e.g. amorphous silicon or polysilicon
H10D 86/0231
Of multiple TFTs: using masks, e.g. half-tone masks

Low temperature polysilicon thin film transistor

Life of this patent

Abstract

Claims11

Low temperature polysilicon thin film transistor

Life of this patent

Abstract

Claims11