Thin film transistor array panel and manufacturing method thereof

A method of manufacturing a thin film transistor array panel, the method comprising:

• forming a gate electrode on a substrate;
• forming a gate insulator covering the gate electrode;
• forming a source electrode and a drain electrode, each of the source electrode and the drain electrode disposed on the gate insulator, the source electrode including a transparent material and the drain electrode opposing the source electrode;
• forming a partition including a first opening exposing portions of the source electrode and the drain electrode;
• and
• forming an organic semiconductor in the first opening,
• wherein the source electrode includes a first boundary opposing a second boundary of the drain electrode relative to the gate electrode, the opposing boundaries overlapping boundaries of the gate electrode.