Spin Based Memory Coupled to CMOS Amplifier

A hybrid magnetoelectronic spin-based memory cell comprising:

• a memory element situated over a silicon based substrate and which is configured to transport a current of spin polarized electrons, including:
• i) a first ferromagnetic layer with a first changeable magnetization state comprising iron, permalloy and/or cobalt;
• ii) a second ferromagnetic layer with a second non-changeable magnetization state also comprising iron, permalloy and/or cobalt and which conducts said spin current;
• wherein a magnitude of a spin polarized current passing through both said first ferromagnetic layer a second ferromagnetic layer can be varied to store a data value in said memory cell having at least two logic levels;
• a memory cell selector coupled to an output of said electron spin-based memory, said memory cell selector including a semiconductor based isolation element which can be activated to read said data value;
• a complementary metal oxide semiconductor (CMOS) sense amplifier coupled to said memory cell selector and which is adapted to determine said data value based on said magnitude of said current of spin polarized electrons.