Wafer level packaging to lidded chips

A method of making a plurality of lidded microelectronic elements, comprising:

• (a) assembling a lid wafer with a device wafer;
• (b) forming tapered openings through a thickness of the lid wafer, each of the openings aligned to one or more contacts exposed at a front face of the device wafer;
• and
• (c) severing the device wafer along the dicing lanes.

A method of making a plurality of lidded microelectronic elements, comprising:

• (a) assembling a lid wafer with a device wafer to form a lidded device wafer;
• (b) removing portions of the lid wafer overlying contact regions of the device wafer, the contact regions including rows of contacts disposed at a front face of the device wafer;
• and
• (c) severing the device wafer along dicing lanes into lidded microelectronic elements each having a lid and at least one row of contacts exposed by the lid.

A method of making a plurality of lidded microelectronic elements, comprising:

• (a) providing a device wafer having a front surface and a plurality of contacts on the front surface;
• (b) assembling an inner surface of a lid wafer to the front surface of the device wafer, the lid wafer including a first portion consisting essentially of inorganic material extending between the inner surface and an outer surface of the lid wafer and second portions including polymeric material disposed within openings in the first portion;
• (c) forming channels extending through the second portions to expose rows of said contacts adjacent to dicing lanes of said device wafer;
• and
• (d) severing the assembled lid wafer and device wafer along dicing lanes into lidded microelectronic elements.

A lidded microelectronic element, comprising:

• a microelectronic element having a front face and a plurality of peripheral edges bounding said front face, a device region at said front face and a contact region including a plurality of exposed bond pads adjacent to at least one of said peripheral edges;
• a lid mounted to said microelectronic element above said device region such that at least some of said bond pads are exposed beyond edges of said lid;
• and
• a support plate mounted below a rear face of said microelectronic element, said support plate underlying at least a portion of said rear face adjacent to said at least one of said peripheral edges.